By Richard L. Sites, Richard T. Witek
Alpha AXP structure Reference handbook
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Extra resources for Alpha AXP Architecture Reference Manual
Software Note: If the address specified by a STx_C instruction does not match the one given in the preceding LDx_L instruction, an MB is required to guarantee ordering between the two instructions. Hardware/Software Implementation Note: STQ_C is used in the first Alpha AXP implementations to access the MailBox Pointer Register (MBPR). In this special case, the effect of the STQ_C is well defined (that is, not UNPREDICTABLE) even though the preceding LDx_L did not specify the address of the MBPR.
When F31 is specified as a register source operand, a true zero-valued operand is supplied. 3 for a definition of true zero. Results of an instruction that specifies F31 as a destination operand are discarded and it is UNPREDICTABLE whether the other destination operands (implicit and explicit) are changed by the instruction. In this case, it is implementation-dependent to what extent the instruction is actually executed once it has been fetched. It is also UNPREDICTABLE whether exceptions are signaled during the execution of such an instruction.
4 Floating-Point Operate Instruction Format The Floating-point Operate format is used for instructions that perform floatingpoint register to floating-point register operations. The Floating-point Operate format allows the specification of one destination operand and two source operands. The Floating-point Operate format is shown in Figure 3-5. Figure 3-5: Floating-Point Operate Instruction Format 31 2120 26 25 Opcode Fa 16 15 Fb 5 4 Function 0 Fc A Floating-point Operate format instruction contains a 6-bit opcode field and an 11bit function field.